Sheqin Dong : rechercher sur Z-Library

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1

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Optimal Two-Dimension Common Centroid Layout Generation for MOS Transistors Unit-Circuit

Di Long,, Xianlong Hong,, Sheqin Dong,

Année:

2005

Langue:

english

Fichier:

PDF, 281 KB

english, 2005

2

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - VLSI Block Placement with Alignment Constraints based on Corner Block List

Song Chen,, Xianlong Hong,, Sheqin Dong,, Yuchun Ma,, Chung-Kuan Cheng,

Année:

2005

Langue:

english

Fichier:

PDF, 302 KB

english, 2005

3

TSF3D: MSV-driven Power Optimization for Application-Specific 3D Network-on-Chip

Wang, Kan, Dong, Sheqin, Jiao, Fengxian

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

2017

Langue:

english

Fichier:

PDF, 1.97 MB

english, 2017

4

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Arbitrary convex and concave rectilinear block packing based on corner block list

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Song Chen,, Chung-Kuan Cheng,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 319 KB

english, 2003

5

[IEEE International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (5-9 Nov. 2000)] IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140) - Corner block list: an effective and efficient topological representation of non-slicing floorplan

Xianlong Hong,, Gang Huang,, Yici Cai,, Jiangchun Gu,, Sheqin Dong,, Chung-Kuan Cheng,, Jun Gu,

Année:

2000

Langue:

english

Fichier:

PDF, 565 KB

english, 2000

6

[IEEE 4th International Conference on ASIC - Shanghai, China (23-25 Oct. 2001)] ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) - VLSI/PCB placement with predefined coordinate alignment constraint based on sequence pair

Rui Liu,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Jun Gu,

Année:

2001

Langue:

english

Fichier:

PDF, 296 KB

english, 2001

7

[IEEE 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Shanghai, China (2006.10.23-2006.10.26)] 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Cubic Packing with Various Candidates for 3D IC Design

Ma, Yuchun, Li, Zhuoyuan, Hong, Xianlong, Cong, Jason, Dong, Sheqin

Année:

2006

Langue:

english

Fichier:

PDF, 84 KB

english, 2006

8

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Performance Constrained Floorplanning Based on Partial Clustering

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Song Chen,, Chung-Kuan Cheng,

Année:

2005

Langue:

english

Fichier:

PDF, 206 KB

english, 2005

9

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Fixed-outline Floorplanning with Constraints through Instance Augmentation

Rong Liu,, Sheqin Dong,, Xianlong Hong,, Kajitani, Y.

Année:

2005

Langue:

english

Fichier:

PDF, 364 KB

english, 2005

10

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Buffer planning based on block exchanging

Hongjie Bai,, Sheqin Dong,, Xianlong Hong,, Song Chen,

Année:

2006

Langue:

english

Fichier:

PDF, 3.56 MB

english, 2006

11

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - Buffer planning for 3D ICs

Sheqin Dong,, Hongjie Bai,, Xianlong Hong,, Goto, Satoshi

Année:

2009

Langue:

english

Fichier:

PDF, 683 KB

english, 2009

12

[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Floorplanning for 2.5-D system integration using multi-layer-BSG structure

Sheqin Dong,, Shuyi Zheng,, Xianlong Hong,

Année:

2006

Langue:

english

Fichier:

PDF, 4.38 MB

english, 2006

13

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Post-floorplanning power optimization for MSV-driven application specific NoC design

Wang, Kan, Dong, Sheqin

Année:

2014

Langue:

english

Fichier:

PDF, 446 KB

english, 2014

14

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - Module placement with boundary constraints using O-tree representation

Rui Lu,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Jun Gu,, Chung-Kuan Cheng,

Année:

2002

Langue:

english

Fichier:

PDF, 320 KB

english, 2002

15

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Evaluating a bounded slice-line grid assignment in O(nlogn) time

Song Chen,, Xianlong Hong,, Sheqin Dong,, Yuchun Ma,, Yici Cai,, Chung-Kuan Cheng,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 486 KB

english, 2003

16

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - A Fast 3D-BSG Algorithm for 3D Packing Problem

Zhang, Lingyi, Dong, Sheqin, Hong, Xianlong, Ma, Yuchun

Année:

2007

Langue:

english

Fichier:

PDF, 454 KB

english, 2007

17

[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Algorithms for analog VLSI 2D stack generation and block merging

Rui Liu,, Sheqin Dong,, Xianlong Hong,, Di Long,, Jun Gu,

Année:

2003

Langue:

english

Fichier:

PDF, 430 KB

english, 2003

18

[IEEE 2018 IEEE International Symposium on Circuits and Systems (ISCAS) - Florence, Italy (2018.5.27-2018.5.30)] 2018 IEEE International Symposium on Circuits and Systems (ISCAS) - Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips

Jiao, Fengxian, Dong, Sheqin, Yu, Bei, Li, Bing, Schlichtmann, Ulf

Année:

2018

Langue:

english

Fichier:

PDF, 832 KB

english, 2018

19

APWL-Y: An accurate and efficient wirelength estimation technique for hexagon/triangle placement

Yaoguang Wei, Sheqin Dong, Xianlong Hong

Journal:

Integration, the VLSI Journal

Année:

2007

Langue:

english

Fichier:

PDF, 792 KB

english, 2007

20

Signal through-the-silicon via planning and pin assignment for thermal and wire length optimization in 3D ICs

Xu He, Sheqin Dong, Yuchun Ma

Journal:

Integration, the VLSI Journal

Année:

2010

Langue:

english

Fichier:

PDF, 1.47 MB

english, 2010

21

Floorplanning with abutment constraints based on corner block list

Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu

Journal:

Integration, the VLSI Journal

Année:

2001

Langue:

english

Fichier:

PDF, 278 KB

english, 2001

22

Deterministic VLSI block placement algorithm using Less Flexibility First principle

SheQin Dong, XianLong Hong, YuLiang Wu, Jun Gu

Journal:

Journal of Computer Science and Technology

Année:

2003

Langue:

english

Fichier:

PDF, 1001 KB

english, 2003

23

An optimum placement search algorithm based on extended Corner Block List

Sheqin Dong, Shuo Zhou, Xianlong Hong, Chungkuan Cheng, Jun Gu, Yici Cai

Journal:

Journal of Computer Science and Technology

Année:

2002

Langue:

english

Fichier:

PDF, 1.00 MB

english, 2002

24

A buffer planning algorithm for chip-level floorplanning

Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Gu Jun

Journal:

SCIENCE CHINA Information Sciences

Année:

2004

Langue:

english

Fichier:

PDF, 485 KB

english, 2004

25

[IEEE 2008 Asia and South Pacific Design Automation Conference (ASPDAC) - Seoul, South Korea (2008.03.21-2008.03.24)] 2008 Asia and South Pacific Design Automation Conference - Symmetry constraint based on mismatch analysis for analog layout in SOI technology

Jiayi Liu,, Sheqin Dong,, Xianlong Hong,, Yibo Wang,, Ou He,, Satoshi Goto,

Année:

2008

Langue:

english

Fichier:

PDF, 856 KB

english, 2008

26

[IEEE 2009 IEEE 8th International Conference on ASIC (ASICON) - Changsha, Hunan, China (2009.10.20-2009.10.23)] 2009 IEEE 8th International Conference on ASIC - Multi-voltage and level-shifter assignment driven floorplanning

Yu, Bei, Dong, Sheqin, Goto, Satoshi

Année:

2009

Langue:

english

Fichier:

PDF, 2.63 MB

english, 2009

27

Buffer planning as an Integral part of floorplanning with consideration of routing congestion

Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Cheng, C.K., Jun Gu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

2005

Langue:

english

Fichier:

PDF, 1.06 MB

english, 2005

28

[IEEE 2007 Asia and South Pacific Design Automation Conference - Yokohama, Japan (2007.01.23-2007.01.26)] 2007 Asia and South Pacific Design Automation Conference - Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning

Ma, Yuchun, Li, Zhuoyuan, Cong, Jason, Hong, Xianlong, Reinman, Glenn, Dong, Sheqin, Zhou, Qiang

Année:

2007

Langue:

english

Fichier:

PDF, 9.24 MB

english, 2007

29

UNISM: Unified Scheduling and Mapping for General Networks on Chip

Ou He, Sheqin Dong, Wooyoung Jang, Jinian Bian, Pan, D.Z.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Année:

2012

Langue:

english

Fichier:

PDF, 2.41 MB

english, 2012

30

Corner block list representation and its application with boundary constraints

Xianlong Hong, Yuchun Ma, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Gu Jun

Journal:

SCIENCE CHINA Information Sciences

Année:

2004

Langue:

english

Fichier:

PDF, 914 KB

english, 2004

31

[IEEE ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 - Yokohama, Japan (30 Jan.-2 Feb. 2001)] Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455) - VLSI floorplanning with boundary constraints based on corner block list

Yuchun Ma,, Sheqin Dong,, Xianlong Hong,, Yici Cai,, Chung-Kuan Cheng,, Jun Gu,

Année:

2001

Langue:

english

Fichier:

PDF, 601 KB

english, 2001

32

[IEEE 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) - Yokohama (2013.1.22-2013.1.25)] 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC) - Power optimization for application-specific 3D network-on-chip with multiple supply voltages

Kan Wang,, Sheqin Dong,

Année:

2013

Langue:

english

Fichier:

PDF, 687 KB

english, 2013

33

[IEEE 2010 International Conference on Green Circuits and Systems (ICGCS) - Shanghai, China (2010.06.21-2010.06.23)] The 2010 International Conference on Green Circuits and Systems - Thermal effects of leakage power in 3D ICs

Ma, Yuchun, Wang, Kan, Dong, Sheqin, Wang, Yu, Hong, Xianlong

Année:

2010

Langue:

english

Fichier:

PDF, 1.45 MB

english, 2010

34

[IEEE 48th Midwest Symposium on Circuits and Systems, 2005. - Covington, KY, USA (2005.08.7-2005.08.10)] 48th Midwest Symposium on Circuits and Systems, 2005. - 3D CBL: an efficient algorithm for general 3D packing problems

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Cheng, C.K.

Année:

2005

Langue:

english

Fichier:

PDF, 278 KB

english, 2005

35

Multi-bend bus-driven floorplanning considering fixed-outline constraints

Sheng, Wenxu, Dong, Sheqin

Journal:

Integration, the VLSI Journal

Année:

2013

Langue:

english

Fichier:

PDF, 796 KB

english, 2013

36

[IEEE 2011 16th Asia and South Pacific Design Automation Conference ASP-DAC 2011 - Yokohama, Japan (2011.01.25-2011.01.28)] 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) - Network flow-based simultaneous retiming and slack budgeting for low power design

Yu, Bei, Dong, Sheqin, Ma, Yuchun, Lin, Tao, Wang, Yu, Chen, Song, Goto, Satoshi

Année:

2011

Langue:

english

Fichier:

PDF, 141 KB

english, 2011

37

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Module placement based on quadratic programming and rectangle packing using less flexibility first principle

Sheqin Dong,, Zhong Yang,, Xianlong Hong,, Yuliang Wu,

Année:

2004

Langue:

english

Fichier:

PDF, 238 KB

english, 2004

38

[IEEE ASP-DAC 2005. Asia and South Pacific Design Automation Conference 2005 - Shanghai, China (18-21 Jan. 2005)] Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005. - LFF algorithm for heterogeneous FPGA floorplanning

Jun Yuan,, Sheqin Dong,, Xianlong Hong,, Yuliang Wu,

Année:

2005

Langue:

english

Fichier:

PDF, 779 KB

english, 2005

39

[IEEE 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2008.11.10-2008.11.13)] 2008 IEEE/ACM International Conference on Computer-Aided Design - A novel fixed-outline floorplanner with zero deadspace for hierarchical design

Ou He,, Dong, Sheqin, Jinian Bian,, Goto, Satoshi, Chung-Kuan Cheng,

Année:

2008

Langue:

english

Fichier:

PDF, 617 KB

english, 2008

40

[IEEE 2011 International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2011.03.14-2011.03.16)] 2011 12th International Symposium on Quality Electronic Design - Novel and efficient min cut based voltage assignment in gate level

Lin, Tao, Dong, Sheqin, Chen, Song, Ma, Yuchun, He, Ou, Goto, Satoshi

Année:

2011

Langue:

english

Fichier:

PDF, 192 KB

english, 2011

41

[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - Fixed outline multi-bend bus driven floorplanning

Wenxu Sheng,, Sheqin Dong,, Yuliang Wu,, Goto, Satoshi

Année:

2010

Langue:

english

Fichier:

PDF, 241 KB

english, 2010

42

[IEEE 2011 International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2011.03.14-2011.03.16)] 2011 12th International Symposium on Quality Electronic Design - Application-specific Network-on-Chip synthesis: Cluster generation and network component insertion

Zhong, Wei, Yu, Bei, Chen, Song, Yoshimura, Takeshi, Dong, Sheqin, Goto, Satoshi

Année:

2011

Langue:

english

Fichier:

PDF, 236 KB

english, 2011

43

[IEEE 2005 6th International Conference on ASIC - Shanghai, China (24-27 Oct. 2005)] 2005 6th International Conference on ASIC - Analog Constraints Extraction based on the Signal Flow Analysis

Zhe Zhou,, Sheqin Dong,, Xianlong Hong,, Qingsheng Hao,, Song Chen,

Année:

2005

Langue:

english

Fichier:

PDF, 1.13 MB

english, 2005

44

[IEEE IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) - Porto Alegre, Brazil (2007.03.9-2007.03.11)] IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) - Interconnect Power Optimization Based on Timing Analysis

Yang, Liu, Dong, Sheqin, Ma, Yuchun, Hong, Xianlong

Année:

2007

Langue:

english

Fichier:

PDF, 272 KB

english, 2007

45

[IEEE Ninth International Conference on Computer Aided Design and Computer Graphics (CAD-CG'05) - Hong Kong, China (07-10 Dec. 2005)] Ninth International Conference on Computer Aided Design and Computer Graphics (CAD-CG'05) - An Efficient Algorithm to Fixed-Outline Floorplanning Based on Instance Augmentation

Rong Liu,, Sheqin Dong,, Xianlong Hong,

Année:

2005

Langue:

english

Fichier:

PDF, 151 KB

english, 2005

46

[IEEE 4th International Conference on ASIC - Shanghai, China (23-25 Oct. 2001)] ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) - Integrated floorplanning and power supply planning

Shuo Zhou,, Sheqin Dong,, Xiaohai Wu,, Xianlong Hong,

Année:

2001

Langue:

english

Fichier:

PDF, 347 KB

english, 2001

47

[IEEE 4th International Conference on ASIC - Shanghai, China (23-25 Oct. 2001)] ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) - A compact algorithm for placement design using corner block list representation

Yuchun Ma,, Xianlong Hong,, Sheqin Dong,, Yici Cai,, Chung-Kuan Cheng,, Jun Gu,

Année:

2001

Langue:

english

Fichier:

PDF, 479 KB

english, 2001

48

[IEEE 2005 6th International Conference on ASIC - Shanghai, China (24-27 Oct. 2005)] 2005 6th International Conference on ASIC - A Fast Placement Approach for Large Scale Modules Based on Less Flexibility First Principles

Shaojun Wei,, Sheqin Dong,, Xianlong Hong,, Youliang Wu,

Année:

2005

Langue:

english

Fichier:

PDF, 2.56 MB

english, 2005

49

[IEEE 2012 17th Asia and South Pacific Design Automation Conference (ASP-DAC) - Sydney, Australia (2012.01.30-2012.02.2)] 17th Asia and South Pacific Design Automation Conference - Linear optimal one-sided single-detour algorithm for untangling twisted bus

Tao Lin,, Sheqin Dong,, Song Chen,, Goto, Satoshi

Année:

2012

Langue:

english

Fichier:

PDF, 232 KB

english, 2012

50

[IEEE 2011 IEEE 9th International Conference on ASIC (ASICON 2011) - Xiamen, China (2011.10.25-2011.10.28)] 2011 9th IEEE International Conference on ASIC - Through-Silicon-Via assignment for 3D ICs

Jianchang Ao,, Sheqin Dong,, Chen, Song, Satoshi Goto,

Année:

2011

Langue:

english

Fichier:

PDF, 374 KB

english, 2011